2022 Conference Program

10:00 a.m. – 12:00 p.m.
1: Planning the PCB Design
Speaker: Susy Webb, Design Science

A great deal of PCB design is about planning what must be done to meet the needs of engineering, fabrication, assembly, test, and the end-user. We will discuss some parts of each to help decide which ones will need priority on the current project. Choosing effective parts that will group well and promote good signal flow is a good start. Thinking about the system and how the board will fit into it, deciding the constraints, mounting, and impedance needs are extremely important as well. We will examine how the parts might place, and plan the routing possibilities based on that, with stackup considerations important for the circuit flow to be dealt with at the same time. Finally, we will look at some of the DfM needs to acknowledge how they may be incorporated, while still considering the electrical needs.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. – 12:00 p.m.
2: The Mechanical Side of PCBs
Speaker: Tomas Chester, Chester Electronic Design

All PCB projects have mechanical and physical parameters, from their size to how they are supported within their utilization, which have downstream impacts within our digital thread. This seminar will take an in-depth look at a variety of existing EDA design tools and new mechanical methods that can be harnessed to yield a successful final product, while also examining the impact of stresses on the layer stackup. Whether you are a solo designer or an engineer within a large team, the material covered will enable participants to identify and solve complex design problems.

This seminar will focus on:

  • Existing implemented mechanical PCB features
  • Advanced PCB fabrication techniques
  • Thermal solutions in the mechanical domain.

The following topics will be covered:

  • • PCB mounting holes and backdrilling
  • Cross-sectional strength of stackups
  • Thermal transfer within PCBs and impact of heatsinks
  • Semi-flex and multi stackup stepped PCB construction.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. – 12:00 p.m.
3: Signal Attenuation in Very High-Speed Circuits
Speaker: Rick Hartley. RHartley Enterprises

In all high-speed/high-frequency circuits, signal integrity is dependent on a number of variables, all of which accumulate to impact the noise budget of the circuit. With very high-speed circuits, an even larger number of issues comes into play, and all the effects are more extreme. Some problems are driven by design deficiencies, some by the physical structure and design of the ICs, and still more are driven by the PCB copper style and base material parameters.
This course will outline all the effects impacting signal integrity at very high speeds and will detail such items as via stubs, jitter, inter symbol interference, impact of copper style on skin effect, loss tangent, impact of layer change during routing and other major signal integrity concerns, as well as the impact some of these items have on timing and Y-axis attenuation of signal eyes. Also discussed will be solutions to these issues, including some new high-speed base materials.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
12:00 p.m. – 1:00 p.m.
Lunch-And-Learn: Free Lunch for Conference Attendees
Sponsored by Polar Instruments
(Monday conference attendees and speakers only)
Marlborough Room
1:00 p.m. – 4:30 p.m.
4: Designing Boards with Today’s BGAs
Speaker: Susy Webb, Design Science

Fanout and routing of today’s BGAs can be quite challenging! It may require a lot of creativity to set up the patterns of signals and vias needed to get all the connections out of the parts. Doing that while trying to maintain a good return path, signal integrity, and EMI and crosstalk control can be even more complicated. Additionally, manufacturing concerns are unique to the newer BGAs because of their small pad sizes, the trace widths needed, and the small capacitors used. In this presentation, we will discuss all those and more, including choosing effective BGAs, the placement of caps, power and stackup information that might be helpful, and grid systems for through hole and microvia fanout.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
1:00 p.m. – 4:30 p.m.
5: IoT/Low Layer Count PC Board Design
Speaker: Rick Hartley, RHartley Enterprises

Circuit boards for the IoT (Internet of Things) world are often driven by the need for low power dissipation, low cost (which drives very-low-layer count), moderate- to high-density and mixed-signal applications. This combination of needs can make the board design an extreme challenge. Creating a 1-, 2- or 4-layer board with excellent signal integrity and low noise/interference and no EMI issues can, by itself, be a serious challenge.

This 3.5-hour course will discuss when it is necessary to control impedance of lines, how to do it cost-effectively, proper setup of routed lines to keep circuit energy from spreading (preventing interference), even on a one-layer board, design of antenna into the PCB, circuit grounding in low-layer-count boards, power distribution without the benefit of power planes, ground bounce, and crosstalk with low-layer-count PCBs.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Intermediate, Advanced
1:00 p.m. – 3:00 p.m.
FREE! Understanding the Promise of Additively Manufactured Electronic Circuits and Devices
Speaker: Jaim Nulman, Nano Dimension; Paul Deffenbaugh, Sciperio; and Michael Schleicher, Semikron 

Join the AME Academy for the first time at PCB East 2022 to gain a deep understanding of how additively manufactured electronics are influencing the way electronics are designed and produced.  3-D printed electronics are enabling novel new electronic designs and performance where the imagination of the designer is the only limit, from shrinking a PCB into an AME for same functionality while maintaining standards such as creepage, to innovative RF signals into the mmWave range with reduced weight.

This special free hybrid (live and online) session includes the following presentations:

  • Taking AME from design to testing
  • Conformal surfaces with AME and nScrypt
  • AME opportunities and classifications: A PCB designer perspective

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator

Target audience: Beginner, Intermediate 
10:00 a.m. – 11:00 a.m.
6: Improving Circuit Design and Layout for Accessibility and Success
Speaker: Tomas Chester, Chester Electronic Design

With this seminar, attendees will be given details and examples of additional information that can be embedded within their existing design process. This content is aimed at improving the successful outcome of their design and reducing the time spent acquiring circuit, component, or layout knowledge. Whether you are a solo designer or an engineer within a large team, these design additions will enable participants to look beyond their own immediate workflow and improve the project design process.

The seminar will focus on:

  • Project foresight
  • Multi-channel/multi-project design reuse
  • Identical characterization during the entire development cycle.

The following topics will be covered:

  • Component/library creation for future/multi-project use
  • Schematic accessibility and complexity reduction
  • Printed circuit schematic and layout design strategies for verification and debug
  • Procedural interactions of a successful project.

Attendees will gain methods for improving design success:

  • Design examples and experience interacting with various project states
  • Methods for reducing verification and debug cycles
  • Multi-user interactive perspectives.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, Test Engineer, Assembly Engineer/Operator
Target audience: Beginner
9:00 a.m. – 11:00 a.m.
8: (FREE) The 21 Most Common Design Errors Caught by Fabrication (and How to Prevent Them)
Speaker: Ray Fugitt, DownStream Technologies, and David Hoover, TTM

In preparation for this presentation, we talked to many of the largest PCB manufacturers in the US and abroad. We then developed a list of the most common errors found on incoming designs. We started with 10, and based on popular demand, we’ve expanded and keep updating that list! We look at each of the errors and discuss ways to find them before the designs are sent out for manufacturing. Methods we will look at include netlist comparison, design for manufacturing, and design rule analysis. We encourage attendee participation and ask folks to bring their challenges for discussion. After this seminar, the PCB designer will have knowledge to assist them in using their existing tools to produce better and more accurate designs.

Who should attend: PCB Designer/Design Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
11:00 a.m. – 12:00 p.m.
9: (FREE) Keynote: From Possibility to Reality
Speaker: Gene Weiner, Weiner International Consulting

“It’s a new day for industry engineers facing challenges and opportunities with new tools, products and software at their disposal to create never before possible interconnected packages. A realm of new possibilities in design and manufacturing are being made possible by rapidly emerging advances in a wide variety of additive manufacturing processes of printed circuits and precision components, as well as specialty substrates.

Looming new technologies, including AI, offer the chance to create new designs, such as precision capacitors in situ, odd-shaped precision inductors (in place), precision shielding in place, rapid precise placement of Type 6 or 7 solder pastes permitting higher first-pass yield on assembly of very fine components, and more that could reduce re-spins or make faster adjustments.

Design engineers who are aware of these innovations in equipment, processes, and materials and their capabilities can be more creative. One of the challenges will be to establish standards for newly designed products and their compositions.

In this keynote, Weiner will draw upon his more than a half-century of global firsts and experiences with major inflection points and new product entries into the PCB fabrication and EMS sectors of electronic packaging to introduce and predict the possible and the probable.

Who should attend: PCB Designer/Design Engineer, System Designer, SI Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator, Sales and Marketing

Target audience: Beginner, Intermediate, Advanced

1:30 p.m. – 3:30 p.m.
10: A Systems-Level View of High-Frequency PCB Design
Speaker: Zachariah Peterson, Northwest Engineering Solutions

As many design teams may have experienced, high-speed designs are confronted with many of the signaling and layout challenges seen in high-frequency designs. This technical session explores some of the correspondences between high-speed PCB design and analysis as they relate to the fundamental concepts in high-frequency design. Topics will be explored at the system level with a focus on interconnect design, routing, signal measurement, network analysis, material selection, stackups, parasitics, and PCB layout. Throughout the session, the presenter draws on familiar comparisons to important topics in high-speed design. Some sample interconnect, antenna, and waveguide designs will be presented to give attendees a baseline for understanding important high-frequency PCB design concepts and how to approach these advanced designs from the systems level.

Who should attend: PCB Designer/Design Engineer, System Designer, SI Engineer, Test Engineer
Target audience: Advanced
1:30 p.m. – 3:30 p.m.
11: Industry Best Practices for Hardware IP Reuse
Speaker: Stephen Chavez, Siemens

PCB designers today must take advantage of the automation and horsepower in our respective EDA tools. We just don’t simply “connect the dots” or “push the magic button,” as some may suggest. We design complex PCBs that contain physical packages smaller than ever before, but we are also addressing electrical, mechanical, and thermal variables in a much higher level of complexity due to today’s industry evolution, not to mention the need to design it faster while cutting cost and resources. We are designing PCBs that contain signal speeds and edge rates faster than ever. As if the electrical and mechanical design complexity of a PCB weren’t enough of a challenge, add in manufacturing and producibility complexities on top of that. All this makes designing entire “complex systems” a true challenge indeed. Simply put, success in PCB design means knowing and understanding what you are doing and how the decisions you make and implement upstream impact downstream ramifications. With today’s EDA tools, harnessing the horsepower and capitalizing on their full capability, when possible, can be a huge difference in getting it right the first time, reducing re-spins (cost), increasing yields, and ultimately getting to market faster.

This session focuses on how to harness the horsepower of your respective EDA tool, and shares a recent success story regarding hardware IP design reuse. We’ll discuss industry best practices within the design process, along with the pros and cons that affect ROI when best practice recipes are implemented and when they are not implemented (the cost of doing nothing).

What You Will Learn:

  • Increase productivity and proficiency with current/future EDA software (automation)
  • Capitalize on existing known good hardware by taking advantage of hardware IP design reuse
  • A success story regarding automation and hardware IP design reuse
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate, Advanced
1:30 p.m. – 3:30 p.m.
12: (FREE) Ask the Flexperts with Lessons Learned
Speaker: Mark Finstad, Flexible Circuit Technologies and Nick Koop, TTM Technologies

This course will cover the entire gamut of flexible and rigid-flex circuits from two of the most recognized names in the flexible circuit industry: Mark Finstad (co-chair of IPC-2223) and Nick Koop (co-chair of IPC-6013). Topics covered will include mechanical design/material selection, cost drivers, bending and forming concerns, testing, and issues unique to rigid-flex. This course also includes a complete virtual plant tour of a flexible circuit manufacturing facility to help attendees understand the manufacturing processes. Throughout the presentation, the instructors will share real-life stories of flexible circuit applications gained over 35+ years in the industry. Some are success stories, others not so much, but all provide excellent lessons learned. The instructors also welcome and encourage questions and enjoy wandering off-course with lively interactive discussions on specific topics from the class.

Who should attend: : PCB Designer/Design Engineer, System Designer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Intermediate, Advanced
3:30 p.m. – 4:30 p.m.
13: (FREE) Proper PCB Layout – DDR2, 3, 4, etc.
Speaker: Rick Hartley, RHartley Enterprises

The majority of today’s digital systems utilize double data rate (DDR) memory. The advantages are many, mostly that we get twice the amount of information transfer per given “clock frequency.” More data transfer without increased signal integrity or EMI risk: Fabulous! Over the years, guidelines and rules have been developed, attempting to ensure DDR bus structures function as intended. Unfortunately, many rules are overly conservative and require excessive restrictions in PCB layout, adding time and cost to PCB design. Worse, these restrictions can add layers and cost to the PCB itself.

This presentation will focus on identifying reasonable rules and guidelines, as well as proper PCB layout concepts to ensure that DDR structures function as intended without adding extra time or cost to the project.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Beginner, Intermediate, Advanced
10:00 a.m. – 12:00 p.m.
14: From DC to AC – Power Integrity and Decoupling Primer for PCB Designers
Speaker: Ralf Bruening, Zuken

Today, supply voltages decrease with every new silicon generation, contributing as well to the goal of reducing power consumption of electronics. This and the resulting shrinking noise margins for these ICs define increasing demands for the quality and stability of power distribution systems of the PCBs. Shrinking form factors with decreasing board real estate (e.g., IoT devices) and emerging technologies (e.g., autonomous driving, advanced communication units) add fuel to the fire. Hence tighter requirements and constraints from silicon vendors are defined for the power distribution networks (PDN) PCB designers have to follow and implement in conjunction with tighter decoupling schemes. Application-dependent restrictions (e.g., discrete package allowance in automotive) and stringent cost and quality demands further complicate the game.

In this two-hour workshop, the requirements and the basics of PCB power distribution systems are explained in detail. Plate capacitance, loop inductances and cavity resonance are explained without deep math. Side effects to the signal integrity (SI) and EMC behavior of board structures are discussed using illustrated practical examples. The role of decoupling capacitors and their evolution in recent years are a major part of the workshop. Guidelines for a first order covering and resolving power integrity issues are given regardless of the used PCB-design and ECAD process. Simulation capabilities addressing power integrity (PI) during PCB design will be explained and demonstrated by animated slides in a generic, vendor-neutral manner as one powerful problem-solving approach for PI issues. Silicon vendor support documents (e.g., design guidelines, constraint-documents, reference designs or spreadsheet tools) to address power integrity are introduced and discussed. Examples from various industries (e.g., automotive) will complement the session with practical application experience.

Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer,
Target audience:Beginner, Intermediate
10:00 a.m. – 4:30 p.m.
15: PCB Design for Engineers
Speaker: Susy Webb, CID, Design Science

This class will feature an overview of the processes of board design from an engineering perspective. To begin, we will have a conversation about how the electronics and physics are involved and why controlling rise time, field energy, and transmission lines are extremely important to the signals on the board. Placement will be discussed next, with order, flow, and setting up potential routing to come being some of those topics. The planes and stackup structure will play a major role in the quality of the design and impedance control, especially if the design is high-speed, and plane and capacitor placement are a large part of power distribution as well. The way signals are routed and how their return current is set up is critical for their performance. We will discuss fanouts, using grids, the signal flow from layer to layer, layer-paired routing and spacing. HDI technology can be a huge benefit to dense boards, fine-pitch parts, and BGAs, so we will go over their setup and routing. All these topics will include information on signal integrity, EMI and impedance control, to make a board that works well from the first build. Many aspects of making a board manufacturable also help to make it less expensive, so an examination of that will wrap up the technical information, followed by information on pros and cons of hand-routing vs. autorouting and the quality of board possible.

Who should attend: PPCB Designer/Design Engineer, System Designer, Hardware Engineer, Fabricator Engineer/Operator, Assembly Engineer/Operator
Target audience: Intermediate, Advanced
10:00 a.m. – 12:00 p.m.
16: Routing and Termination to Control Signal Integrity
Speaker: Rick Hartley, RHartley Enterprises

Virtually all ICs used in digital circuits today have very fast rise time outputs. Traces on boards with fast rise and fall times are referred to as high-speed transmission lines. A number of items contribute to signal integrity issues in such lines. One associated set of contributors to SI problems is lack of proper impedance control, termination and routing. Understanding a few simple concepts can take a circuit from failure to success, and understanding the concepts well can dramatically reduce cost and layer count of PCBs. This presentation will focus on identifying when a line is high-speed, effect on signal integrity if proper routing is not implemented, cost-effective (free) impedance control, routing schemes that work, when and how to properly terminate a line and best board stack-ups for impedance control, routing control and low cost.

Who should attend:PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer, Fabricator Engineer/Operator
Target audience: Beginner, Intermediate, Advanced
1:00 p.m. – 3:00 p.m.
7: Making Intelligent Material Decisions
Speaker: Michael R. Creeden, CID+, Insulectro

The complexity of needs in today’s hybrid circuitry such as RF, HSD and antenna is becoming common to find all types on one board. Learn how innovations with hybrid materials help solve most hybrid circuit challenges.

Hybrid boards are not new to the industry, but many of the solutions are based on outdated constructs, and it’s time for innovation. With this presentation, attendees will receive many examples of how to construct and solve a board with most of the concerns of today’s 5G performance challenges: dense high-speed digital, RF and antennas, and many more, addressing HDI solvability, signal integrity/EMI, PDN and improved manufacturability.

Attendees will receive an understanding of basic EM theory with a strong emphasis on material and process solutions that help routing application. This starts with data capture, rules definition, and tool automation, and covers routing perspectives from the start of the layout cycle, all the way to the review and verification stages, into generation of deliverables for manufacturing. Emphasis is on the role EM fields play to manage your circuit to be cost-effective, perform well electrically and be a reliable high-yield product. We will touch on all types of circuit technologies in many market segments.

Focus is on integration between design and manufacturing early in the development cycle, to build a product that is correct-by-construction and performs on Revision-1.

We will cover a wide range of topics, including:

  • Hybrid material selection for rigid, rigid and flex
  • Rationale for considering HDI
  • Placement, routing techniques, power delivery, EMI shielding
  • Technological challenges from design through manufacturing process.

Students will learn what it takes to successfully implement these concerns:

  • Complex solvability
  • High-speed, RF and thermal performance
  • High yield and reliable manufacturability.
Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator
Target audience: Intermediate, Advanced
1:00 p.m. – 3:00 p.m.
17: RF and Mixed Signal PCB Layout
Speaker: Rick Hartley, RHartley Enterprises

This session is intended for board designers to understand the things RF engineers request during PCB layout. Experienced RF engineers will likely not learn anything new from this course, as the material is mainly geared to board designers.

Due to sensitivity in analog circuits, the keys to full functionality (whether you are designing very high-frequency analog PCBs, mixing RF with digital, or mixing low-frequency analog with digital) are signal integrity and noise control in the design of the printed circuit board. This course will cover differences between analog and digital, circuit changes over time, lumped vs. distributed length lines, reflections/return loss/VSWR, low- and high-frequency current, transmission line behavior, impedance control, microstrip vs. stripline, coplanar waveguide with ground, circuit termination, 1/4 wavelength couplers and filters designed into board copper, layout techniques and strategies, critical routing and circuit isolation, ground plane splitting (when to and when not to), mismatched loads and other discontinuities, signal splitters, tuning transmission lines, power bus decoupling for RF vs. digital circuits and board stackups for mixed RF and digital circuits.

Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer
Target audience: Beginner, Intermediate